Ah, I must not have seen that x.x
Thanks, DrDnar!
Thanks, DrDnar!
WriteFlashByte:
push hl
push af
ld bc, ProgramRoutineEnd - ProgramFlashRoutine
call AllocateExecutableMem
ex hl, de
ld hl, ProgramFlashRoutine
ldir
pop af
pop hl
ex hl, de
ld bc, WriteFlashRet
push bc
jp (hl)
WriteFlashRet:
ret
ProgramFlashRoutine:
; a = value, hl = address
; Flash program sequence
; This is being done according to how the datasheet says it should be done.
; The standard interrupt must not trigger during this sequence or the flash chip
; will not get the write command.
; At 6MHz, one clock cycle will be 167ns
; At 15MHz, one clock cycle will be 67ns
ex hl, de
push af
push hl
push af
di
xor a
out (6), a
; reset bus (not needed by the books)
;ld a, 0F0h
;ld (4000h), a
; First bus cycle---unlock
ld a, 0AAh
ld (4AAAh), a
; Second bus cycle---unlock
ld a, 55h
ld (4555h), a
; Third bus cycle---write command
ld a, 0A0h
ld (4AAAh), a
; Fourth bus cycle---program data
pop af
out (6), a
pop hl
pop af
ld (hl), a
; Wait for data to be good
; "During the Embedded Program Algorithm, an attempt to read the devices will
; produce the complement of the data last written to DQ7. Upon completion of the
; Embedded Program Algorithm, an attempt to read the device will produce the
; true data last written to DQ7"
; "DQ5 will indicate if the program or erase time has exceeded the specified
; limits (internal pulse count). If this occurs, reset the device with command
; sequence."---Fujitsu documentation
programWaitLoop:
ld b, a
ld a, 0FDh ; This checks for the CLEAR key.
out (1), a ; If pressed, it aborts.
in a, (1)
cp 0BFh
jr z, abortProgram
xor (hl)
bit 7, a
ld a, b
jr z, programDone
bit 5, (hl)
jr z, programWaitLoop
abortProgram:
ld a, 0F0h
ld (4000h), a
ret
programDone:
ei
ret
ProgramRoutineEnd:
WriteFlashByte:
push hl
push af
ld bc, ProgramRoutineEnd - ProgramFlashRoutine
call AllocateExecutableMem
ex hl, de
ld hl, ProgramFlashRoutine
ldir
pop af
pop de
jp (hl)
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