Register R in Z80 Assembly

[hotdog1234]

I read the following about the R register: "R is the dynamic RAM refresh register, it increases after every instruction by an amount depending on the instruction. Its contents are pseudo random. You can only load to and from it using A."

Does R increase by the number of T-States per instruction, or how much does it increase depending on the instruction?

[Mapar007]

It doesn't really matter. You basically just use it as a pseudo-random number generator.

Sigma's guide says: 'Bits 0 to 6 are incremented after each instruction is executed, bit 7 staying at whatever was loaded.'

[DigiTan]

I think it's based on fetches and prefetches. You can test this by single-stepping through the emulator's debug mode.

[Seren]

I vaguely recall it being written somewhere that opcodes that are identified by 1 byte increment it by 1, while those that take 2 increment by 2. (not including the parameters)


Here we go:

http://www.absoluteastronomy.com/topics/Zilog_Z80
"The refresh register, R, increments each time the CPU fetches an opcode (or opcode prefix) and has therefore no simple relationship with program execution. This has sometimes been used to generate pseudorandom numbers in games, and also in software protection schemes. It has also been employed as a "hardware" counter in some designs; a famous example of this is the ZX81, which lets it keep track of character positions on the TV screen by triggering an interrupt at wrap around (by connecting INT to A6)."