When I was working with BDD's, I noticed that if BDD's were converted to electronic circuits, the resulting circuit would be delay insensitive.
I recently explored that idea further, and found that a system that functions similarly already exists, though it uses different gates.
My idea was to use these two gates:
switch gate
Code:
reduction gate (to be used at the end of a circuit of switch-gates):
Code:
( ? means "don't care")
Constructing an optimal delay insensitive circuit is then as easy as constructing an optimal BDD for combinatorial functions.
Does this make any sense?
I recently explored that idea further, and found that a system that functions similarly already exists, though it uses different gates.
My idea was to use these two gates:
switch gate
Code:
in || out
c | v || x | y
0 | 0 || 0 | 0
0 | 1 || 0 | 0
1 | 0 || 0 | 1
1 | 1 || 1 | 0
reduction gate (to be used at the end of a circuit of switch-gates):
Code:
in || out
x | y || c | v
0 | 0 || 0 | ?
0 | 1 || 1 | 1
1 | 0 || 1 | 0
1 | 1 || 0 | ?
( ? means "don't care")
Constructing an optimal delay insensitive circuit is then as easy as constructing an optimal BDD for combinatorial functions.
Does this make any sense?