I think I have a MUCH better idea on the power consumption now. (And by the way, any electrical engineer who saw my previous estimate would be right to say "What the hell are you talking about boy?!")
"By today's standards for electronic computers the ENIAC was a grotesque monster. Its thirty separate units, plus power supply and forced-air cooling, weighed over thirty tons. Its 19,000 vacuum tubes, 1,500 relays, and hundreds of thousands of resistors, capacitors, and inductors consumed almost 200 kilowatts of electrical power."
-http://ftp.arl.army.mil/~mike/comphist/eniac-story.html
The PDP-8/M uses a H740 switch mode power supply that provides +15V @ 1A, +5V @ 17A, -15V @ 5A together with LTC-L, PWR OK L, PWK OK EN, AC LO L, and DC LO L signals (it should be noted that not all of these signals are used within the PDP-8M). This power supply is also used within the 5.25″ PDP-11/05 and PDP-11/10.
-http://pdp8.co.uk/tag/pdp-8m/
The ENIAC took 200 kilowatts. It ran on discrete vacuum tubes
The PDP-8/M took 5V @ 17 amps. That is 85 watts (right?). It ran on about the same discrete components I am going to need.
So, baseing the power I'm going to need off of a similar CPU, I should be needing a supply that uses less than 5v @ 17A. (The PDP was a complete computer AND was 12-bit, not 4-bit.)

To visualize how completely off I was, I included the ENIAC. That was the very first computer. The guess I had for power EXCEEDED THAT OF THE ENIAC!!!! Whoa, I was off! Kerm, I believe that when it comes to stuff like this, you are always right. So, the supply should be LESS than 17 amps for sure!

edit:
UltDev. I do believe you have answered all of my questions with those links. All that remains now is for me to finish my schematic, run it by you and some other really smart people, and build the prototype.
And all those times I said microarchitecture, I should have been saying schematic. A microarchitecture is a very specific thing, and I should have conducted a lot more research before insisting such a thing on my superior. (Same is true for Kerm. I do believe I have him not posting replies to ME, because I was a real jerk to him. I should probably go back and delete those dumb things I said... but I didn't, because things can't be erased from people minds. Sad Sorry, I'm not really good with people. Sad Sad)
KermMartian wrote:
A whole bank of a handful of servers uses fewer than 15amps. I think you're a little vague on the scale of power usage of circuits. Smile


Well, servers typically use *properly* constructed hardware Wink

Of course, he still isn't going to even approach what a home circuit can deliver unless he manages to short something big.
adept wrote:
Same is true for Kerm. I do believe I have him not posting replies to ME, because I was a real jerk to him. I should probably go back and delete those dumb things I said... but I didn't, because things can't be erased from people minds.
One thing you should know about me is that when I hold grudges, I hold them for a very, very long time. However, you have to do something really serious to get me to hold a grudge against you, like make up stories about me to try to get me kicked out of school and steal my love interest at the same time. Fear not, you didn't make me hold any permanent grudge against you at all. Smile I was being sincere about not wanting to get between you and your father, who I am sure is an extremely knowledgeable and competent (and experienced) EE.
adept wrote:
I think I have a MUCH better idea on the power consumption now. (And by the way, any electrical engineer who saw my previous estimate would be right to say "What the hell are you talking about boy?!")
"By today's standards for electronic computers the ENIAC was a grotesque monster. Its thirty separate units, plus power supply and forced-air cooling, weighed over thirty tons. Its 19,000 vacuum tubes, 1,500 relays, and hundreds of thousands of resistors, capacitors, and inductors consumed almost 200 kilowatts of electrical power."
-http://ftp.arl.army.mil/~mike/comphist/eniac-story.html
The PDP-8/M uses a H740 switch mode power supply that provides +15V @ 1A, +5V @ 17A, -15V @ 5A together with LTC-L, PWR OK L, PWK OK EN, AC LO L, and DC LO L signals (it should be noted that not all of these signals are used within the PDP-8M). This power supply is also used within the 5.25″ PDP-11/05 and PDP-11/10.
-http://pdp8.co.uk/tag/pdp-8m/
The ENIAC took 200 kilowatts. It ran on discrete vacuum tubes
The PDP-8/M took 5V @ 17 amps. That is 85 watts (right?). It ran on about the same discrete components I am going to need.
So, baseing the power I'm going to need off of a similar CPU, I should be needing a supply that uses less than 5v @ 17A. (The PDP was a complete computer AND was 12-bit, not 4-bit.)

To visualize how completely off I was, I included the ENIAC. That was the very first computer. The guess I had for power EXCEEDED THAT OF THE ENIAC!!!!


IIRC your original estimate was ~100A @ 5V for your circuit, which would equate to 500W, which is much less than 200kW Smile

adept wrote:
All that remains now is for me to finish my schematic, run it by you and some other really smart people, and build the prototype.


Quick tip: you might want to design the datapath first, then the control unit of your processor (do yourself a favor and use MSI components in your design, then convert it to all-discrete components if you must Razz)

Overall though, it's good to hear that you're learning and understanding all of this information thus far Smile
It's been about 2 weeks, and I have finished the schematic, ran tests and stuff, and started the PCB. The decision was made to use MSI, because if I have any hope of this working, its with that method. The biggest problem I see now is in the manufacturing of the board. I have the boards, know how to etch, but there are FAR TOO MANY HOLES!!! AHHHH! I have hundreds of those stupid tiny holes to drill, and the bits aren't chuck-able (is that a word?), they break easily, and they're expensive. So I've been making calls with business' to see if they have a laser cutter or something that can make hundred of low tolerance holes in my board, without melting or burning the fiberglass. Oh, and every one of those holes represents a itty-bitty solder connection, with copper traces just fractions of an inch away, and so I wanna see if I can also borrow one of those fancy wave-solder tables. Then the next step after that is to make a practical program. It is all in op-codes though, I have no assembly! So I have to think through all that. Finally, I have drastically altered the specs of the machine. I'll post them tomorrow. On a side-note, Calc82 is out of the box again, and I've made lots of work on it. The calculator is just hours short, but I've been avoiding it for a while, because of the tiny solder connections. (call me a wuss!) I'll probably do it on the long weekend. I'll post all my work later though.
Good to hear you've stuck with this project, and I look forward to hearing more details of what you've come up with so far Smile

If you're looking for a good place to get PCBs made, this is where you want to go: http://dorkbotpdx.org/wiki/pcb_order
I'm getting 3 PCBs made right now for $2.65 shipped.

But more importantly have you breadboarded your design first before laying out a PCB?
That's great, Ultimate Dev'r; thanks for sharing the link. Yeah, breadboarding your design first is of vital importance to find all the things that you think should work but don't.
The parts are due on Monday. It is Saturday right now. Currently what is on my mind is the power. The peak draw of the CMOS chips I decided to use is about 2.5 amps. I have a switching power supply for a notebook computer designed for 4 amps at 16 volts. The problem is that the number exceeds my needs in amperage, and also in voltage, which needs to be 5. Is there any way to wire 7805 regulators in parallel to share the load? Or do I have to find a different way of regulation that can fit what I want? The other progress being made is I'm cutting wires to standard lengths. That is really monotonous and boring. I am going to build this at school, and take lots of pictures because it is for my science fair. Probably won't get on after Monday for a while here, however I will finish this and post all the pictures here to be displayed.
EDIT:
I really wish I could say I breadboarded the whole design, but alas, I haven't. I don't have any magic math calculating skills, and probably still don't know about how much power it will take. However, I do know that for a science fair like this one, things don't always HAVE to go exactly to plan, and its about the learning. I do know that I havelearned so much from this project, and it has been lots of fun. Anyway, cheers to it working as planned, and should it not, I still know more that anybody else within a 100 mile radius of me about this stuff. (Well maybe the people at the labs up in Los Alamos NM or the Intel plant know more...) But for my being only 15, I feel pretty accomplished. Anyone reading this, join me in crossing my fingers it works!
adept wrote:
The parts are due on Monday. It is Saturday right now. Currently what is on my mind is the power. The peak draw of the CMOS chips I decided to use is about 2.5 amps. I have a switching power supply for a notebook computer designed for 4 amps at 16 volts. The problem is that the number exceeds my needs in amperage, and also in voltage, which needs to be 5. Is there any way to wire 7805 regulators in parallel to share the load? Or do I have to find a different way of regulation that can fit what I want?


Yes, you can connect 7805's in parallel to accommodate 2.5A of current draw, but the real question is how did you calculate that your circuit will require 2.5A of current?

adept wrote:
I really wish I could say I breadboarded the whole design, but alas, I haven't. I don't have any magic math calculating skills, and probably still don't know about how much power it will take. However, I do know that for a science fair like this one, things don't always HAVE to go exactly to plan, and its about the learning.


Not breadboarding your design is setting yourself up for failure Wink

adept wrote:
I do know that I havelearned so much from this project, and it has been lots of fun. Anyway, cheers to it working as planned, and should it not, I still know more that anybody else within a 100 mile radius of me about this stuff. (Well maybe the people at the labs up in Los Alamos NM or the Intel plant know more...) But for my being only 15, I feel pretty accomplished. Anyone reading this, join me in crossing my fingers it works!


Don't get ahead of yourself now; you've learned a lot in the past month, but you still have much to learn Smile Any ideas for future endeavours into electronics?
I was going to quote Ultimate Dev'r's post and individually agree with each of the three major sections in his post, but I'll leave it as one big THIS Those power figures sound way, way too high; not breadboarding and testing first guarantees with 99.99% certainty that at least a few bits will fail, and exponentially more the more complex the device or circuit is. Finally, although you have indeed (hopefully) been learning a lot, there is a ton you can still learn.
I got the 2.5 amps by looking at the datasheet. I looked down to the table labeled : "Absolute maximum ratings.", and underneath at the supply current. It listed plus minus 50 mA. So I took that and multiplied it by 50 chips, which is the number of chips I plan to use on each perf-board times two. What you get is 2500 mA, which in 2.5 A. Now, if I'm not mistaken, shouldn't I plan to supply the maximum current the chip could draw? because that's what I thought it was. (under the table, it says "exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction." I really don't know what to make of that.)
UltDev:
You know that PCB place you were talking about... That sounds really cool. Do they like order a humongous board with all your designs on it and cut it up and ship it? If so, maybe the next project I do, I'll try that, when I don't have this time crunch.
EDIT:
I was reading deeper into the datasheet, and guess what! It says under DC characteristics that at 6.0 volts, it has a "quiescent supply current" of "1.0 - 10.0 uA"!!! I feel kinda dumb for looking at the max ratings now. I guess 10.0 MILLIONTHS of an amp times fifty is far different than 50 THOUSANDTHS of an amp times fifty. So I'm going to find a different power supply for it that supplies 0.0005 amps. (please correct me if I still can't calculate that right)
KermMartian wrote:
I was going to quote Ultimate Dev'r's post and individually agree with each of the three major sections in his post, but I'll leave it as one big THIS Those power figures sound way, way too high; not breadboarding and testing first guarantees with 99.99% certainty that at least a few bits will fail, and exponentially more the more complex the device or circuit is. Finally, although you have indeed (hopefully) been learning a lot, there is a ton you can still learn.


That's a long way of saying "I am too lazy to actually make my own post so instead I quote people and then don't say anything new" Razz

adept wrote:
So I took that and multiplied it by 50 chips, which is the number of chips I plan to use on each perf-board times two.


Karnaugh Maps. Use them.

adept wrote:
UltDev:
You know that PCB place you were talking about... That sounds really cool. Do they like order a humongous board with all your designs on it and cut it up and ship it? If so, maybe the next project I do, I'll try that, when I don't have this time crunch.


Yep; the guy runs a large batch order that he sends out to be manufactured about every other week, then he gets a large panel back from the board house, cuts it up and ships it out to everyone; the next 2-layer board batch goes out February 7.
Quote:
Karnaugh Maps. Use them.

OK. I see what they are supposed to do, but I am totally confused how to use one. And what do they have to do with my power problem?

Do these maps simplify these circuits??

Really cool webpage by the way. Lots of buttons.... And they do stuff. I'll see if I can make one of these maps to show off on my science fair board. I'll read the page more tomorrow.

Back to the power... I have never taken an electronics class before, and all I know I get from experience. Experience hasn't been kind enough to enlighten me on any of these formulas or how to use them. Like the datasheet gives Icc(opr)=Cpd*Vcc*Fin+Icc/4 (per gate) for calculating the average operating current. So what am I supposed to plug in for I, C, V, and F. (Data sheet page: http://www.toshiba.com/taec/components2/Datasheet_Sync//151/237.pdf)
(sorry if I'm too dumb to read a datasheet too...)

Links to schematics:
http://img213.imageshack.us/i/cputransistorschematicr.png/
http://img440.imageshack.us/i/cputransistorschematicp.png/
http://img651.imageshack.us/i/cputransistorschematicp.png/
adept wrote:
Quote:
Karnaugh Maps. Use them.

OK. I see what they are supposed to do, but I am totally confused how to use one. And what do they have to do with my power problem?

Do these maps simplify these circuits??

Really cool webpage by the way. Lots of buttons.... And they do stuff. I'll see if I can make one of these maps to show off on my science fair board. I'll read the page more tomorrow.


Yes, K-Maps simplify logic designs so you use fewer gates, which in turn lowers power consumption. The link that I gave you should be enough to get a basic grasp of how to use K-Maps.

adept wrote:
Back to the power... I have never taken an electronics class before, and all I know I get from experience. Experience hasn't been kind enough to enlighten me on any of these formulas or how to use them. Like the datasheet gives Icc(opr)=Cpd*Vcc*Fin+Icc/4 (per gate) for calculating the average operating current. So what am I supposed to plug in for I, C, V, and F. (Data sheet page: http://www.toshiba.com/taec/components2/Datasheet_Sync//151/237.pdf)
(sorry if I'm too dumb to read a datasheet too...)


From what I gather on SAX, you have 3 boards with 50 chips each. The max current draw (Icc) from 1 chip is 50mA (.05A), so for your circuit the max power consumption would be 3*50*.05=7.5A.
I only have until Monday to tweak the design around. And I think I was already doing that in my brain. (if you mean don't run "1 Nor 2" 8 times over in the demultiplexor, I was planning on fixing that... someday.)
Wait, chips or transistors? A chip and a transistor are totally different things. Those schematics have about a million (probably more like 150) transistors scattered about; surely you didn't ignore us about not using discrete transistors to build your gates.
He's referring to chips; he just hasn't posted the new schematics yet Wink
UltDev and Kerm:
I totally am realizing that I can't remake the schematics. The whole concept is in my head though. I just don't have time to spend re-drawing the design. Oh, and the over 1000 solder connections I made today were really exhausting. I am SO tired, you can't even comprehend it. Right now, I have soldered all the sockets to the board, and started to connect all the pin 14's, which are all V++. Next, I will do the ground. Then the plan is to take each input and follow its way through to the output. There are several inputs, and therefore several wires to be followed. I have over a dozen pictures waiting on my camera, but I'm so drop dead tired, I don't feel like hooking the thing up to sync, uploading it all to imageshack, and posting. Hope you understand Smile.
On a side note, ya know, since I'm here anyway.... It snowed over 2 inches today, in the middle of the desert!!!! I spent about an hour and half playing in the snow with band kids, and a while longer with this girl I like. Today was really cool! Computer building, snow, and time with HER!
Well, I'll probably get back later, but for now, I sleep.

Edit: The next day....
Here are the pictures so far. (excuse the size. I did scale down, but it didn't do it enough. Sad )

Here is a picture of my first solder connections on a bread board in a few months. All the other connections I've made have been in the air.



This is a picture of the IC sockets in their pattern. The red is from yesterday, the white from today. (I left my wire stripper at school, and that's why there isn't so much progress today, even though it is a snow day!)



This is the other board. There are two boards with those IC rows on it.



Here are the sockets taped to the board. They hadn't been soldered yet. (I shoulda put this first Very Happy)



Here is the power supply mounted in its spot on the wood I'm building this on. It is a Compaq, not the IBM I was going to use. It supplies 18 amps at 5v, and I only need 7.5-8 amps at 5v. YAY!



Here is a close-up of the mounting bracket (PCI card cover.) I made. It holds it really securely actually!



Here it is from the side. Look at the size of that power supply!! (For reference, the board I cut to standard tabloid size. (11x17 for normal people)



Finally, here is the business end of the power supply. For the science fair, all wires must be taped down, so that's why all the duck tape. (duct tape for those tape nerds out there!)



Whew! I'm going to go work on it some more. It's really freezing, even inside, right now. Brrr! (SNOW DAY!!!)
Are you sure you've left yourself enough room there? I notice that there's no space between the sockets for running inter-column wiring...
@Kerm:
I think I have left enough room. You see, there are only so many inputs. These inputs are used many times over and over again. The idea was that each pin only would have two connections, one into the pin from the input, and another going out to the next chip which required that input. And so on and so forth to infinity. It is the same pattern you see for the power. The problem with my idea though is: If one connection goes south, the whole thing goes south with it. I discovered that with the power. I forgot to solder a wire, and most of the entire thing went down with it. It is the same sort of problem with a series circuit, except this is parallel. That's the only flaw in this sort of design. The pros exceed that though, because I only had to get a few boards. If I had direct connections every time, Each IC would require a space around it of 14 holes, or about an inch and a half! So this is a bit better in a lot of ways, but leaves a smaller tolerance for error. (which, did I mention is already like the edge of a knife?) But yes, Kerm, I see what you mean. I am with you in hoping it can work Smile.
  
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