- Rate my architecture!
- 02 Jan 2021 07:00:42 am Permalink
I'm working on a new ultra-simple (yet still somewhat practical) cpu architecture. It's a 6-bit analog system, with 4 working registers, 64 bytes of RAM and 64 bytes of Program ROM. The end goal of this architecture is to create the most possible programmer freedom within these 64 bytes, while keeping the datapath and controller as simple as possible.
I've done some z80 programming, so I know the instruction set but I want some feedback from experienced developers to see if I am missing any vital instructions, or if things you'd like to do are overly cumbersome. General feedback is also greatly appreciated.
As with z80, registers are A,B,C,D.
A is the accumulator register, so ADD, SUB, and CP instructions are applied with it as the second operand, and stored into A
B is used for loop counters, with DJNZ
C is used for return addresses when a CALL instruction is executed, and is copied back into CP when a RET is executed
D is a pointer register, it is used to access values in calculated addresses
New instructions compared to z80 are carry-conditional instructions (CLD, CEX, CINC, CDEC). They are only executed if the carry is '1'.
There are no bitwise instructions, as the underlying analog hardware is not well suited to implement these. Though if you think these are essential, I can try to fit them in.